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High quality downsizing by LatticeAx cleaving improves planar polishing accuracy and success rates

At ISTFA 2016 in Fort Worth, Texas LatticeGear presented customer results describing how the LatticeAx indenting and cleaving system was used for precise downsizing of a <100 micron thin die that was removed from its package prior to delayering. Delayering a thin, fragile die (layer by layer, edge to edge) is a manual process, an […]

Singapore consortia works on advanced packaging solutions

http://fbs.advantageinc.com/chipscale/jul-aug_2016/#56 Read about how A*STAR’s Institute of Microelectronics consortium will tackle IOT demands by developing low-cost, high reliability and performance packaging for MEMs Wafer Level Chip Scale and Silicon Photonics. These new packaging solutions will certainly require new and innovative failure analysis techniques.